The present invention relates to a control system having one or more memory units and a circuit for enabling access to the memory units for writing information into selected ones of the memory units under particular circumstances and, more particularly, to a protection circuit having means of preventing writing of unintended data to the memory units.
In a conventional postage metering system, it is known to provide an accounting system for recording the amount of funds and other transaction information dispensed during the metering process. These records are electronically maintained in the non-volatile memory units which are part of the accounting system. Because of microcontroller system anomalies, it is important to prevent writing of spurious data into the non-volatile memory. It is known to provide the accounting system with a circuit for latching the non-volatile memories inactive, thereby preventing writing, and requiring the microprocessor to latch open a gate means following the issuance of a write signal and a chip select signal from the microprocessor. After the intended write cycle is completed, the microprocessor causes the gate to be closed.
It has been determined that under certain anomalous conditions, an unintentional write process may be issued by the microprocessor to an address decoder unit which in response thereto enables the gate. Under this condition an unintended write can occur.